1. Field of the Invention
The present invention relates to a semiconductor device (hereinafter referred to as "high voltage MOS IC") comprising a high voltage MOS field-effect transistor and a usual low voltage MOS field-effect transistor for driving the transistor which are formed on a single semiconductor substrate.
2. Description of the Prior Art
Drivers for display panels such as EL panel, PDP, etc. or other high voltage drivers comprise a plurality of high voltage MOS field-effect transistors and low voltage logic circuits as disclosed in U.S. Pat. No. 4,194,214. These components are usually arranged in such a pattern that the transistors are disposed at the peripheral portion of a die, with the circuits positioned at the center of the die.
With high voltage MOS IC's of such a construction, a high voltage is applied to the die peripheral portion surrounding the low voltage logic circuits, so that a groove of potential occurs on the pattern of low voltage logic circuits, and external charges accumulate in this portion. This influences the IC substrate, leading to the drawback of inverting the field portion of the low voltage MOS field-effect transistor constituting the logic circuit and inducing a malfunction of the circuit.
Although Examined Japanese Patent Publications SHO 48-14153 and SHO 48-28826 disclose a technique for electrically shielding the device region within semiconductor substrates, the technique is still unable to completely eliminate the influence of high voltage applied to the logic circuit-surrounding peripheral portion of an MOS IC of the above construction.